Day 1:
- Introduction: why SI engineers need to know also the basics of PI and EMC. Illustrations of how these disciplines can interact in unexpected ways in our designs.
- Impedance, reflections, matching: after a brief summary of reflections, transmissions and S parameter, we discuss how much reflection is too much and look at the untold perils of periodicity created by glass weave, BGA and connector perforations and backplane slots.
- PCB and cable constructions: what we don’t know about the materials and processes can hurt our design. Stackup nuances that matter for signal integrity: which layer is core vs. prepeg matters a lot under some circumstances. Why knowing the laminate parameters alone is not enough to determine losses.
- Discontinuities: how different types of vias influence signal integrity. When do you need to worry about bends; the full picture. How to optimize via transitions, when does it matter.
Day 2:
- Everything you need to know about losses: absorption, reflection, radiation. Dielectric vs conductor losses. Effect of surface roughness. Effect of temperature and humidity on conductive and dielectric losses.
- Crosstalk: The hidden far-end crosstalk in striplines. How to reduce far end crosstalk in microstrip. How a very important power distribution measurement principle applies to crosstalk measurements as well and what happens if we ignore it.
- Differential signaling: sorting out the age-old question; 'Should I use loosely or tightly coupled traces?' Potential problems and solutions for delay-meander traces. How reflections show up in skew. When skew will hurt your design.
- System SI: clock and signal routing, system performance metrics, how we got from setup-hold to signal-to-noise ratio and lately to Channel Operating Margin (COM).
Day 3:
- SI measurements: why you need to know where the calibration's reference plane is, what the major calibration options are, how to choose among them. Which view is better for SI: frequency-domain VNA results or time-domain TDR data. Comparing pros and cons, reviewing cabling and SI probing options. Testing for environmental effects: impact of temperature and humidity.
- Important rules to keep in mind for simulations. Simple and tricky pitfalls to avoid in selecting, creating and validating models. The challenges of and helpful suggestions for correlations. Modeling temperature effects, roughness, dielectric loss. Mixed dielectrics. reliability and life expectancy of components. Explaining and analyzing nuances of laminate material and component data sheets to which we must pay attention.
Istvan is the Principal Signal and Power Integrity Engineer at Samtec. He is currently working on new technologies and system designs that enable customers to improve power delivery and increase data speeds beyond 100Gbps. He is a Life Fellow of IEEE for his contributions to signal-integrity and power-integrity designs, modeling, measurements and simulations. He has 40+ years of experience in high-speed and high-power electronics designs as well as teaching and consulting.