Advanced Printed Circuit Board Design for EMI and Signal Integrity

Course details

Code
O18C766H6Y
Fees
From £895.00
Dates
Tue 11 Jun 2019 - Thu 13 Jun 2019

Advanced Printed Circuit Board Design for EMI and Signal Integrity



Overview

This two-day course on 11 and 13 June 2019 provides a unique blend of theory, applications, and numerous hardware demonstrations to describe effective PCB design strategies to eliminate EMC problems such as radiated emissions & immunity, and ESD, and to improve low and high frequency signal integrity of analog and digital sensors.

The real-time hardware demonstrations use a spectrum analyzer, oscilloscope and signal generators to illustrate inductance, common-impedance coupling, and ground loops in PCBs, cables, and systems. Specific examples of single-point, multi-point, “good”, and “bad” grounds will be discussed. We will also apply the course learning by discussing and examining actual SILENT client case histories as well as examples of integrated circuit application notes.

This two-day course is Day 1 and Day 3 of a four-day programme from 11 – 14 June 2019:

At checkout, you may choose to add either or both of Day 2 and Day 4 to your enrolment.

Programme details

11 June 2019 - Introduction

Section 1: Measuring and inducing noise

  • Electromagnetic Compatibility
  • Radiated emissions & associated measurements + DEMONSTRATION
  • High level overview of impact of EMC requirements on system design and performance
  • Case histories of US, international, and SILENT EMC problems and their impact
  • Uncertainty in measurements. Underlying problems in predicting results
  • Conducted emissions—mode separation, LISNs, troubleshooting
  • Function and purpose of immunity tests with simplified schematics

Section 2: Predictiong and solving noise problems

  • Capacitance—in ESD, PD boards, decoupling networks, filter networks, cables + DEMONSTRATION
  • Inductance—in PC boards, connectors, ICs, high speed signal paths, decoupling networks, filter networks
  • Behavior of current paths at low and high frequencies + DEMONSTRATION
  • Develop a customized source/victim/coupling-factor list of your company’s designs

_____________________________________________________

13 June 2019

Section 1: PCB Noise Models

  • Review of the noise coupling model
  • Review of the four noise coupling paths
  • Emissions and immunity

Section 2: Capacitance, Inductance and Current Paths in PC Boards

  • Good and bad capacitance
  • Good and bad inductance
  • Current loops
  • Low versus high frequency current paths
  • Inductance and low versus high frequency current paths + DEMONSTRATION
  • “Ground plane” splits - appropriate and inappropriate uses
  • Connectors, cables, and I/O wires connected to the PCB

Section 3: Signals on PC Boards

  • Which signals are important?
  • What do they look like? + DEMONSTRATION
  • Transmission lines, characteristic impedance, terminations + SIMULATIONS
  • Harmonic content versus duty cycle + DEMONSTRATION

Section 4: Power Distribution

  • Functions of PCB “grounds”
  • Voice noise
  • Decoupling and filtering
  • Board layer stack-ups
  • Funny design ideas, current research, new design applications

Section 5: Design Techniques and Examples

  • Component placement
  • Signal routing + stackup
  • Examining vendor applications notes that give bad EMC advice for PCB design
  • Examining past SILENT PCB design review findings

Test and measurement equipment for this course is supplied by Rohde & Schwarz 

Certification

Participants who attend the full course will receive a Certificate of Attendance. The sample shown is an illustration only and the wording will reflect the course and dates attended.

Accommodation

Although not included in the course fee, accommodation may be available at our on-site Rewley House Residential Centre.

To enquire about a vacancy, about room charges or to make a booking, please contact the Residential Centre directly: 

+44 (0)1856 270362
res-ctr@conted.ox.ac.uk

Fees

11 and 13 June - Days 1 and 3 (standard course fee): £895.00
12 June - Day 2 - Applying Practical EMI Design (optional): £447.50
14 June - Day 4 - Mechanical Design for EMC (optional): £447.50

Payment

Fees include course materials, tuition, refreshments and lunches. The price does not include accommodation.

All courses are VAT exempt.

Register immediately online 

Click the “book now” button on this webpage. Payment by credit or debit card is required.

Request an invoice

Send a completed application form to the course administrator by email or post. Please do not send card details via email.

Tutor

Lee Hill

Speaker

SILENT Solutions LLC & GmbH, USA & Germany

Lee Hill is Founding Partner of SILENT Solutions, an electromagnetic compatibility (EMC) consulting firm he started in Silicon Valley in 1992. He is also Managing Director of Silent Solutions GmbH (Munich).

He received his MSEE with highest honors from the Missouri University of Science & Technology EMC Laboratory emclab.mst.edu, where he studied under Dr.’s Thomas Van Doren, Todd Hubing, and James Drewniak.

Lee teaches a graduate course in EMC as a member of adjunct faculty at Worcester Polytechnic Institute (WPI), and is also an EMC course instructor for University of Oxford (England), and for the IEEE EMC Society's annual Global University and Fundamentals Program. Lee is the named inventor of three US patents for EMI control in electronic systems, and provides expert witness services for patent litigation.  While teaching is one of Lee’s favorite jobs at SILENT, the majority of his time is spent providing hands-on hardware troubleshooting of / and design reviews to prevent elusive regulatory and functional electrical noise problems.

Lee is a past EMC course instructor for the University of California Berkeley Extension, Hewlett-Packard, Agilent, Freescale Semiconductor, and General Motors University. Previously Lee was Principal EMC and Systems Engineer at Digital Equipment Corporation’s Workstation Systems Engineering Group in Palo Alto, California.  With over 25 years of EMC design and troubleshooting experience, Lee consults and teaches worldwide, and has been teaching short courses on EMC design and troubleshooting for twenty years, He has presented EMC courses in Taiwan, Singapore, Mexico, Norway, Canada, South Korea, Germany, France, and United Kingdom.

Lee frequently volunteers for the IEEE EMC Society and currently chairs the annual IEEE EMC Symposium’s Fundamentals program & is an instructor for the Symposium’s Global University Program. He is also a past member of the IEEE EMC Society's Board of Directors (2004-2007), and has also served as a member of the Society’s Awards Committee.  In 1994, Lee was appointed to serve a two year term as an IEEE EMC Society Distinguished Lecturer (DL), and from 1999-2006 he served as chair of the DL program. Over the past twenty years Lee has been a frequent featured speaker at IEEE EMC Society fundraising events in cities throughout the US including Santa Clara, Seattle, Portland, Chicago, Milwaukee, Dallas/Fort Worth and Detroit. He has also provided technical presentations to Society chapters in Los Angeles, San Diego, Boston, Austin, Atlanta, Colorado Springs, Pittsburgh, and Orange County, CA.

Learning outcomes

After attending this course, you will be able to:

  • Place decoupling capacitors to obtain best performance for a given layer stackup, based on the latest university research
  • Explain the pros and cons of different PCB stackups, and know where to route and not to route high frequency noise sources
  • Control trace inductance for signal integrity and low noise design
  • Correctly identify the possible noise paths that can disrupt PCB operation and choose appropriate solutions
  • Explain the problems that split ground planes cause and how to use them correctly
  • Choose & place connectors and assign signals for lowest crosstalk, best signal integri-ty, and lowest EMI
  • How to identify mutual inductance and improve the effectiveness of filter capacitors

Identify good and bad design practices when viewing actual PCB layout screenshots
 

Application

If you would like to discuss your application or any part of the application process before applying, please click Contact Us at the top of this page.