Day 1:
- How power integrity, signal integrity and electromagnetic compatibility interact. You will learn why - as opposed to signal-integrity noise- power distribution noise tends to be very wide band.
- Calculating worst-case time-domain power-distribution noise. Reverse Pulse Technique, a very powerful, yet simple methodology to find worst-case time-domain PDN noise response.
- Models of vias and pads, models of various capacitors and power planes. You will see that for power distribution applications, losses are many times our friends. You will learn why and how.
- DC drop on power planes; optimization of plane voltage drop - we will demonstrate that 1+1 is not always 2.
- DC-DC converters in the power distribution network, response time vs. output impedance - you will see live oscilloscope demonstrations of good and bad converter behaviours.
- Minimizing noise by creating flat impedance response, conditions for smooth impedance profiles. We will show that flattening impedance profile is a very effective way to reduce noise.
- Bypass capacitor selection: synthesis of 'Multi-pole', 'Big-V', 'Flat' impedance profiles, area capacitors. You will see the strengths and weaknesses of each and we will discuss how to select the solution suitable for your design on a DDR memory PDN example.
- Stackup/layout considerations, proper location and placement of capacitors, plane splits and plane stitching. Plane splits in reference planes slow down signal edges, radiate, but most importantly, increase crosstalk among signals crossing it.
Day 2:
- Time and frequency-domain description of PDN noise - time domain is better suited for low duty cycle rare, but large noise events. Frequency domain is better to identify any periodic noise component.
- What you need to know about network matrices: impedance, admittance, scattering, and transfer matrices - we will explain why impedance matrix is the good metric for PDN, yet most measurements require S-parameters.
- Linear network characteristics, time and frequency-domain simulations, moving between the domains - we will show many of the common pitfalls when FFT/IFFT is used to generate PDN response.
- Simulating and measuring DC drop - we will illustrate the three-dimensional nature of current distribution at DC.
- High-frequency response, plane modal resonances and their suppression. Plane resonances and plane- capacitor antiresonance increase noise - we will learn three techniques how to suppress these resonances.
- Designing PDN filters: low-Q transfer functions, lossy ferrites - you will receive a simple design tool, which we will use in the class to show how to design a good PLL filter.
- Reliability, life-expectancy and thermal design considerations. You will learn how to select components to meet life expectancy, why you should not use an 85-degC rated ceramic capacitor at 85 degree Celsius temperature. How to select fuse ratings to protect against various levels of system issues. We will illustrate why dynamic current balancing is important for reliability.
Day 3:
- Measurement solutions for PDN; selecting probes and instruments.
- Two-port VNA measurements: the two-port measurement is the only usable approach for measuring low-impedance PDN.
- How to select instruments to do the job without overspending. The little dirty secret of application notes: why many suggest (wrongly!) to measure noise across capacitors.
- Modelling, simulation and measurement of bypass capacitors, ferrites and inductors: some ceramic capacitors and ferrites exhibit strong dependence on DC and AC bias.
- How to simulate and measure DC and AC bias effects. Simulating ceramic capacitors at different temperatures.
- Modelling, simulation and measurement of DC-DC converters - there are a few important DC-DC converter parameters, which are very hard to simulate. You will learn which those are and how to handle them.
- Modelling, simulation and measurement of vias - you will learn why most blind vias can carry more current than plated through holes.
- Live measurement demonstration showing the simultaneous measurement of control-loop stability and output impedance.
- Modelling, simulation and measurement of power planes and systems. Measuring power planes at high frequencies require good connection techniques - you will see case studies when you need 1D, 2D or 3D simulators for power planes.
Istvan is the Principal Signal and Power Integrity Engineer at Samtec. He is currently working on new technologies and system designs that enable customers to improve power delivery and increase data speeds beyond 100Gbps. He is a Life Fellow of IEEE for his contributions to signal-integrity and power-integrity designs, modeling, measurements and simulations. He has 40+ years of experience in high-speed and high-power electronics designs as well as teaching and consulting.